Work place: Electronics and Micro-Electronics Laboratory (E. µ. E. L) Faculty of Sciences of Monastir, Tunisia
Research Interests: Computer systems and computational processes, Computer Architecture and Organization, Algorithm Design
Mohsen Machhout was born in Jerba, on January 31 1966. He received MS and PhD degrees in electrical engineering from University of Tunis II, Tunisia, in 1994 and 2000 respectively. Dr Machhout is currently Associate Professor at University of Monastir, Tunisia. His research interests include implementation of standard cryptography algorithm, key stream generator and electronic signature on FPGA.
DOI: https://doi.org/10.5815/ijigsp.2018.09.01, Pub. Date: 8 Sep. 2018
Computed ultrasonic bone tomography (USCT) is a non-invasive and non-ionizing technique, which ensures the protection of child being against x-rays. The main objective of this article is to use an image processing algorithm to improve the signal-to-noise ratio of ultrasonic computed tomography (USCT) of children bones for automatic detection of osteopathologies. For this fact, we construct an application of image processing with Microsoft Foundation Class Library (FMC) integrated in visual Studio using Haar wavelet algorithm to detect edges. Different methods of image processing for automatic detection are used. Hence, we make accessible the detection of distance between bones due to the application of wavelet transform. As a result, the quality of USCT image was improved and the detection of child osteopathologies became accessible.[...] Read more.
DOI: https://doi.org/10.5815/ijcnis.2015.01.02, Pub. Date: 8 Dec. 2014
The Hash function has been studied by designers with the goal to improve its performances in terms of area, frequency and throughput. The Hash function is used in many embedded systems to provide security. It is become the default choice for security services in numerous applications. In this paper, we proposed a new design for the SHA-256 and SHA-512 functions. Moreover, the proposed design has been implemented on Xilinx Virtex-5 FPGA. Its area, frequency and throughput have been compared and it is shown that the proposed design achieves good performance in term of area, frequency and throughput.[...] Read more.
DOI: https://doi.org/10.5815/ijcnis.2013.06.07, Pub. Date: 8 May 2013
Fault attacks are powerful and efficient cryptanalysis techniques to find the secret key of the Advanced Encryption Standard (AES) algorithm. These attacks are based on injecting faults into the structure of the AES to obtain the confidential information. To protect the AES implementation against these attacks, a number of countermeasures have been proposed.
In this paper, we propose a fault detection scheme for the Advanced Encryption Standard. We present its details implementation in each transformation of the AES. The simulation results show that the fault coverage achieves 99.999% for the proposed scheme. Moreover, the proposed fault detection scheme has been implemented on Xilinx Virtex-5 FPGA. Its area overhead and frequency degradation have been compared and it is shown that the proposed scheme achieves a good performance in terms of area and frequency.
DOI: https://doi.org/10.5815/ijcnis.2013.03.03, Pub. Date: 8 Mar. 2013
Power analysis attacks are types of side channel attacks that are based on analyzing the power consumption of the cryptographic devices. Correlation power analysis is a powerful and efficient cryptanalytic technique. It exploits the linear relation between the predicted power consumption and the real power consumption of cryptographic devices in order to recover the correct key. The predicted power consumption is determined by using the appropriate consumption model. Until now, only a few models have been proposed and used.
In this paper, we describe the process to conduct the CPA attack against AES on SASEBO-GII board. We present a comparison between the Hamming Distance model and the Switching Distance model, in terms of number of power traces needed to recover the correct key using these models. The global successful rate achieves 100% at 11100 power traces. The power traces needed to recover the correct key have been decreased by 12.6% using a CPA attack with Switching Distance model.
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