Maede Kaviani

Work place: Department of Computer Engineering, Najafabad Branch, Islamic Azad University, Najafabad, Esfahan PO BOX: 8514143131, Iran



Research Interests: Logic Circuit Theory, Computer Architecture and Organization, Computer Science & Information Technology


Maede Kaviani received the B.Sc degree in computer hardware and the M.Sc. Degree in computer architecture from Islamic Azad University (IAU), Najaf abad branch, Esfahan, Iran, in 2010 and 2015 respectively. Her interests are in the VLSI, circuit design and impact of technology on Computer Architecture

Author Articles
Design of Low Voltage and High-Speed BiCMOS Buffer for Driving Large Load Capacitor

By Maede Kaviani Hojjat Sharifi Mahdi Dolatshahi Keivan Navi

DOI:, Pub. Date: 8 Jan. 2016

BICMOS circuits are interesting for designers when a high speed output driver is required especially in I/O circuits. Buffer is an important block in high speed circuits, so designing a buffer with high drive capability has a great effect on circuits with large load capacitor. This paper presents a new BiCMOS buffer which uses 32nm technology node for CMOS transistors and 0.18um technology node for BJT transistors. The proposed buffer operates properly in voltage ranges from 0.8v to 1.5v. The capacitor range is from 0.5pf to 200pf; the overshoot of the output in this capacitor range is less than 10% of the supply voltage that is negligible. The proposed design has improvements in delay for about %88 respectively compared to similar CMOS buffers with high capacitor values.

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