This project presents an architecture for approximate matching in Content Addressable Memory (CAM) systems, which are essential for search-intensive applications such as networking and genomic analysis. Traditional CAM designs often suffer from high power consumption and reduced performance. To address these challenges, this work proposes a low complexity sensing scheme that integrates transmission gate logic and a modified inverter architecture using the SAPON technique. The primary objective is to improve power efficiency and write ability in CAM systems. By incorporating the SAPON technique, the design significantly reduces power consumption, enhancing energy efficiency while maintaining high-speed functionality. Transmission gate logic improves write ability, facilitating smoother data operations, particularly in applications requiring approximate matching. The proposed design is thoroughly validated through extensive simulation using the GPDK 45nm library in Cadence Virtuoso. The results show substantial reductions in power consumption and delay, alongside improvements in performance. The optimized CAM architecture demonstrates high tolerance for mismatches, making it ideal for applications such as DNA sequencing and network routing. This CAM design provides a scalable and energy efficient solution for modern computing environments, where performance and low power consumption are critical. Overall, this design offers a reliable and energy-efficient solution for accelerating search operations in data-driven fields, positioning it as an advancement in content-addressable memory technology.