I. M. Zholubak

Work place: Lviv Polytechnic National University, Computer Engineering Department, Stepana Bandery 12, Lviv, Ukraine

E-mail: Ivan.M.Zholubak@lpnu.ua

Website: https://orcid.org/0000-0001-8871-7222

Research Interests: Big data and learning analytics, Artificial intelligent in learning, Hardware Security


Ivan Zholubak is a Senior Lecturer of the Computer Engineering Department at Lviv Politechnic National University, Ukraine. He graduated from Lviv Politechnic National University with the engineer degree in Computer Engineering in 2013. In 2016 he graduated Postgraduate courses at Lviv Politechnic National University, department of Computer Engineering. He has scientific, academic and hands-on experience in the field of algorithms for hardware data protection in cryptography, robotic systems and AI. He is an author of 7 scientific papers.

Author Articles
Galua Field Multipliers Core Generator

By I. M. Zholubak V. S. Hlukhov

DOI: https://doi.org/10.5815/ijcnis.2023.03.01, Pub. Date: 8 Jun. 2023

An important part of based on elliptical curves cryptographic data protection is multipliers of Galois fields. For based on elliptical curves digital signatures, not only prime but also extended Galois fields GF(pm) are used. The article provides a theoretical justification for the use of extended Galois fields GF(dm) with characteristics d > 2, and a criterion for determining the best field is presented. With the use of the proposed criterion, the best fields, which are advisable to use in data protection, are determined.
Cores (VHDL descriptions of digital units) are considered as structural part of based on FPGA devices. In the article methods for cryptoprocessors cores creating were analyzed. The article describes the generator of VHDL descriptions of extended Galois field multipliers with big characteristic (up to 2998). The use of mathematical packages for calculations to improve the quality of information security is also considered.
The Galois field multipliers generator creates the VHDL description of multipliers schemes, describes connections of their parts and generates VHDL descriptions of these parts as result of Quine-McCluskey Boolean functions minimization method. However, the execution time of the algorithm increases with increasing amount of input data. Accordingly, generating field multipliers with large characteristic can take frерom a few seconds to several tens of seconds.
It's important to simplify the design and minimize logic gates number in a field programmable gate array (FPGA) because it will speed up the operation of multipliers. The generator creates multipliers according to the three variants.
The efficiency of using multipliers for fields with different characteristics was compared in article.
The expediency of using extended Galois fields GF(dm) with characteristics d > 2 in data protection tools is analyzed, a criterion for comparing data protection tools based on such Galois fields is determined, and the best fields according to the selected criterion when implemented according to a certain algorithm are determined.

[...] Read more.
Other Articles