Chandra Shekhar

Work place: CSIR – Central Electronics Engineering Research Institute (CSIR-CEERI), Pilani – 333031, Rajasthan, India



Research Interests: Computational Science and Engineering, Computational Engineering, Engineering


Dr. Chandra Shekhar is Director of CSIR-Central Electronics Engineering Research Institute, Pilani, Rajasthan, India. His research interests include VLSI Design and Design Methodologies, Analog IC Design and Mixed Signal Design, Processors and Application Specific Processors (Architecture and Design), CAD for VLSI, Physics and Modeling of MOS Devices, VLSI System Applications. He received M.Sc. degree in Physics in 1971 and Ph.D. degree in 1975, from BITS, Pilani, India. He is a Fellow of IETE and Life Member of Indian Physics Association, Semiconductor Society of India and Indo-French Technical Association.

Author Articles
Prototyping an Automated Video Surveillance System Using FPGAs

By Sanjay Singh Sumeet Saurav Chandra Shekhar Anil Vohra

DOI:, Pub. Date: 8 Aug. 2016

Because of increasing terrorist activities, the resolution of video cameras and the number of cameras deployed for surveillance are increasing exponentially – producing huge amount of video data. Manual analysis of this large volume of video data by human operators for crime scene and forensic analysis is neither reliable nor scalable. This has generated enormous interest in research activities related to automation of video surveillance systems which allows real-time automatic extraction and analysis of information from live incoming video streams and enables automatic detection and tracking of targets without human intervention. To meet the real-time requirements of automated video surveillance systems, very different technologies and design methodologies have been used in literature. These range from use of General Purpose Processors (GPPs) or special purpose Digital Signal Processors (DSPs) or Graphics Processing Units (GPUs) to Application Specific Integrated Circuits (ASICs) or Applications Specific Instruction Set Processors (ASIPs) or even programmable logic devices like Field Programmable Gate Arrays (FPGAs). FPGAs provide real-time performance that is hard to achieve with GPPs/DSPs, limit the extensive design work, time, and cost required for ASICs, and allow algorithmic changes in later stages of system development. Due to these features FPGAs are being increasingly used for prototyping automated video surveillance system quickly. In this paper we present the top level description of a complete automated video surveillance system along with the elaboration of different challenges/issues involved in its design and implementation, a comparative analysis of design methodologies and existing FPGA platforms, complete design flow for prototyping the FPGA-based automated video surveillance system, and details of various primary input/output interfaces required for designing smart automated video surveillance systems for future.

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Moving Object Detection Scheme for Automated Video Surveillance Systems

By Sanjay Singh Sumeet Saurav Chandra Shekhar Anil Vohra

DOI:, Pub. Date: 8 Jul. 2016

In every automated video surveillance system, moving object detection is an important pre-processing step leading to the extraction of useful information regarding moving objects present in a video scene. Most of the moving object detection algorithms require large memory space for storage of background related information which makes their implementation a difficult task on embedded platforms which are typically constrained by limited resources. Therefore, in order to overcome this limitation, in this paper we present a memory optimized moving object detection scheme for automated video surveillance systems with an objective to facilitate its implementation on standalone embedded platforms. The presented scheme is a modified version of the original clustering-based moving object detection algorithm and has been coded using C/C++ in the Microsoft Visual Studio IDE. The moving object detection results of the proposed memory efficient scheme were qualitatively and quantitatively analyzed and compared with the original clustering-based moving object detection algorithm. The experimental results revealed that there is 58.33% reduction in memory requirements in case of the presented memory efficient moving object detection scheme for storing background related information without any loss in accuracy and robustness as compared to the original clustering based scheme.

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Performance Evaluation of Different Memory Components for FPGA based Embedded System Design for Video Processing Application

By Sanjay Singh Ravi Saini Anil K. Saini AS Mandal Chandra Shekhar Anil Vohra

DOI:, Pub. Date: 8 Nov. 2013

Advances in FPGA technology have dramatically increased the use of FPGAs for computer vision applications. Availability of on-chip processor (like PowerPC) made it possible to design embedded systems using FPGAs for video processing applications. The objective of this research is to evaluate the performance of different memory components available on FPGA boards for embedded/platform-based implementations of image/video processing applications. The clustering based change detection algorithm for Ubiquitous Multimedia Environment is selected for evaluating the effect of different memory components (DDR/BRAM) on performance of the system in terms of frame rate (frames per second).

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