Abhilasha Sharma

Work place: Department of ECE, Eternal University, Baru Sahib, H.P,173001, India



Research Interests: Computational Engineering, Engineering


Abilasha Sharma received the B.E degree in electronics and communication engineering from N.M.U, Maharashtra, India, in 2004, and ME degree in Electronics & Communication from Thapar Institute of Engineering & Technology, Patiala, India in 2006. Her research interests are Digital Electronics, Microprocessor, Microcontrollers, DSP, and VHDL

Author Articles
Analysis of Resistance Parasitic of Single Wall CNT bundle with Copper for VLSI Interconnect

By Tarun Parihar Abhilasha Sharma

DOI: https://doi.org/10.5815/ijem.2013.02.01, Pub. Date: 16 Sep. 2013

The rapid technology advancement in VLSI leads to decreased in chip size to few nanometers. With such continues miniaturization of VLSI devices has strong impact on the VLSI technology in certain ways such as increase in resistance. The performances of ICs have been decreasing aggressively with increase in resistance, which furtherlead to increase interconnect delay thus becoming much more significant factor of problem. Thus traditional Copper interconnects have now become a significant performance delimiter due to increase in its resistance at Nano level. Thus to overcome from the limitation of Copper, Carbon Nanotubes have been proposed as a possible future replacement of Copper interconnect. Several different configuration of CNT proposed, out of which Single Wall CNT configuration has been received much attention for their unique characteristics and as a possible alternative to Cu interconnects in future ICs. In this paper we have compare the equivalent circuit model of Single wall CNTs against traditional Cu interconnectfor resistance parameter. For the first time an impact of length, width and mean free path on interconnect resistance is study at 22nm proving a CNT as strong replacement to Copper interconnect.

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