Work place: LIM (Mathematics and Computer Science) Research Laboratory – University of Tiaret – Algeria



Research Interests: Computational Science and Engineering, Computer systems and computational processes, Real-Time Computing, Parallel Computing, Formal Methods


Mostefa BELARBI Computer Science Department Faculty of Mathematics and Computer Science. LIM Laboratory.

Ibn Khaldoun University of Tiaret–Algeria. Doctor in Computer Science. Title of thesis: temporal validation of real-time multitasking applications based on communicating timed automata. INSA, LYON (France) 2003.

Master in Software Engineering. University of Sciences and Technology of Oran- Algeria (with highest honours), title of thesis: An algebraic approach for program construction.Nov 1997.

Engineer of state in computer science, University of Senia, Oran-Algeria. Sep.1988.

Member of LIM (Computer science and mathematics) Laboratory – University Ibn Khaldoun of Tiaret.. Domains of research: applied formal methods, Parallel Computing Design and Validation, Verification of Embedded and Real Time Systems.

Author Articles
Formal and Informal Modeling of Fault Tolerant Noc Architectures

By Mostefa BELARBI

DOI:, Pub. Date: 8 Nov. 2015

The suggested new approach based on B-Event formal technics consists of suggesting aspects and constraints related to the reliability of NoC (Network-On-chip) and the over-cost related to the solutions of tolerances on the faults: a design of NoC tolerating on the faults for SoC (System-on-Chip) containing configurable technology FPGA (Field Programmable Gates Array), by extracting the properties of the NoC architecture. We illustrate our methodology by developing several refinements which produce QNoC (Quality of Service of Network on chip) switch architecture from specification to test. We will show how B-event formalism can follow life cycle of NoC design and test: for example the code VHDL (VHSIC Hardware Description Language) simulation established of certain kind of architecture can help us to optimize the architecture and produce new architecture; we can inject the new properties related to the new QNoC architecture into formal B-event specification. B-event is associated to Rodin tool environment. As case study, the last stage of refinement used a wireless network in order to generate complete test environment of the studied application.

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