Ratybor S. Chopey

Work place: Lviv Polytechnic National University/Software Department, Lviv, 79013, Ukraine

E-mail: chopey.ratybor@gmail.com


Research Interests: Computer systems and computational processes, Computer Architecture and Organization, Data Structures and Algorithms


Ratybor S. Chopey is a postgraduate student of the Software Department of Lviv Polytechnic National University. He received his bachelor and master degree in radio-frequency engineering in Lviv Polytechnic National University in 2013 and 2014 correspondingly.

He has been developing embedded systems since 2014 when The University and Italian company Dinamica Generale S.p.A. signed a cooperation agreement. During these years of collaboration, he had been investigating into problems of embedded systems’ automated testing and execution time estimation and observing and recording behavior of various peripheral devices.

He is a co-author of 7 papers in scientific journals and international conferences proceedings. His area of interest is embedded systems and reliability of complex systems.

Author Articles
A Model for Estimating Firmware Execution Time Taking Into Account Peripheral Behavior

By Dmytro V. Fedasyuk Tetyana A. Marusenkova Ratybor S. Chopey

DOI: https://doi.org/10.5815/ijisa.2018.06.03, Pub. Date: 8 Jun. 2018

The paper deals with the problem of estimating the execution time of firmware. Any firmware is bound to wait for a response from peripheral devices such as external memory chips, displays, analog-to-digital converters, etc. The firmware’s execution is frozen until the expected response is obtained. Thus, any firmware’s execution time depends not only on the computational resources of the embedded system being inspected but also on peripheral devices each of which is able to perform a set of operations during some random time period residing, however, within a known interval. The paper introduces a model of a computer application for evaluation of microcontroller-based embedded systems’ firmware’s execution time that takes into consideration the type of the microcontroller, the total duration of all the assembler-like instructions for a specific microcontroller, all the occasions of waiting for a response from hardware components, and the possible time periods for all the responses being waited for. Besides, we proposed the architecture of the computer application that assumes a reusable database retaining data on microcontrollers’ instructions.

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