Venugopalachar Sridhar

Work place: Department of E & C Engineering, Mandya, 571401, India



Research Interests: Computer systems and computational processes, Embedded System, Systems Architecture, Data Structures and Algorithms


Venugopalachar Sridhar born in 1958, Mysore. B.E degree in Electronics and Communication in PESCE, Mandya, Mysore and M.E in Jadavpur University, Calcutta.He has been awarded the Ph.D degree in IIT Delhi and also been awarded Post doc in Malaysia. He is currently The Principal of P.E.S. College of Engineering, Mandya, Karnataka, India. He was the Registrar (Evaluation) in VTU, India. He has around 29 years of teaching experience.

His research interests include Cryptography, VLSI and Embedded Systems, and Bio-Medical Engineering. He has published more than 50 research papers in various international journals and conferences. He is member for IEEE and life member for ISTE and IETE.

Author Articles
Hardware Realization of Fast Multi-Scalar Elliptic Curve Point Multiplication by Reducing the Hamming Weights Over GF(p)

By Nagaraja Shylashree Venugopalachar Sridhar

DOI:, Pub. Date: 8 Sep. 2014

We present a new hardware realization of fast elliptic curve Multi-Scalar Point Multiplication (MSPM) using the sum of products expansion of the scalars. In Elliptic curve point Multiplication latency depends on the number of one’s (Hamming Weight) in the binary representation of the scalar multiplier. By reducing the effective number of one’s in the multiplier, the multiplication speed is automatically increased. Therefore we describe a new method of effectively reducing the Hamming weight of the scalar multipliers thereby reduces the number of Point Adders when multi scalar multiplication is needed. The increase in speed achieved outweighs the hardware cost and complexity.

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