International Journal of Image, Graphics and Signal Processing(IJIGSP)

ISSN: 2074-9074 (Print), ISSN: 2074-9082 (Online)

Published By: MECS Press

IJIGSP Vol.11, No.11, Nov. 2019

A 1-V 10-bit 16.83-fJ/Conversion-step Mixed Current Mode SAR ADC for WSN

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Dipak S. Marathe, Uday P. Khot

Index Terms

Successive approximation register (SAR), mixed-mode, current-mode, regenerative -comparator, analog-to-digital-converter (ADC), digital-to-analog converter (DAC).


This paper proposes a 10-bit mixed current mode low power SAR ADC for sensor node application. The different entities of a successive approximation register (SAR) analog-to-digital converter (ADC) circuit has a hybrid or mixed mode approach i.e.,voltage mode regenerative comparator; mixed SAR logic; and current mode digital-to-analog converter (DAC). The performance limitation of speed and the kick-back noise of a dynamic comparator is resolved using duty cycle controlled regenerative comparator. A mixed mode logic of a SAR is partitioning the design into synchronous ring counter and asynchronous output register. The data shifting of a ring counter is with the common clock tick while the output register exchanged it asynchronously using handshake signals, resulting in a low power SAR. The current mode switching function in a DAC to reduce asynchronous switching effect resulting in a low energy conversion per step. In overall, the proposed mixed SAR ADC consumes a 41.6  power and achieves an SFDR 69.3 dB at 10 MS/sec and 1 V supply voltage. It is designed and simulated in the 0.18 m TSMC CMOS process. 

Cite This Paper

Dipak S. Marathe, Uday P. Khot, IEEE, Member, " A 1-V 10-bit 16.83-fJ/Conversion-step Mixed Current Mode SAR ADC for WSN", International Journal of Image, Graphics and Signal Processing(IJIGSP), Vol.11, No.11, pp. 43-50, 2019.DOI: 10.5815/ijigsp.2019.11.06


[1]C. Villanueva and A. L. Martin, “An ultra low  energy 8-bit charge redistribution ADC for wireless sensors”, in Proc. IEEE   ICST Conf., Wellington, New Zealand, pp. 198-202, (2013).

[2]P. Harpe et al., “A 0.7 V 7-to-10 bit 0-to-2 MS/s flexible SAR ADC for ultra-low-power wireless sensor networks”, in Proc. IEEE Int. ESSCIRC Conf., Bordeaux, France, pp. 373-376, (2102).

[3]M. Kramer et al., “A 14-Bit 30-MS/s 38-mW SAR ADC Using Noise Filter Gear Shifting”, IEEE Trans. on Circuits and Systems-II:Express Brief, vol. 64, no. 2, pp. 116-120, (2017).

[4]E. Salman and E. Friedman, “Utilizing interdependent timing constraints to enhance robustness in synchronous circuits”, J. Microelectronics, Elsevier, vol. 43, pp. 119-127, ( 2012).

[5]D. S. Marathe and U. P. Khot, “A Systematic approach to determining the duty cycle for regenerative comparator used in WSN", Int. J. of Electronics and Telecommunication (JET), Poland, vol. 65. no. 2, pp. 329-333, (2019).

[6]D. S. Marathe and U. P. Khot, “A 10-Bit 10-MS/s 5.72 nW Mixed SAR Logic for ADC used in Wireless Sensor Node", Accepted at 3rd IEEE Conference on Nascent Technologies in Engineering (ICNTE), India, (2019).

[7]G. Radulov et al., “Smart and Flexible Digital-to-Analog Converters”, Dordrecht Heidelberg London New York: Springer, (2011).

[8]V. K. Garg, “Wireless communications and Networking”, San Francisco, CA:Elsevier Inc., (2008).

[9]A. Tajalli, M. Alioto, Y. Leblebici, “Improving Power Delay Performance of Ultra-Low-Power Subthreshold SCL Circuits", IEEE Trans. on Circuits and Systems-II, pp. 1-5, (2009).

[10]N.Verma and A. P. Chandrakasan, “An ultra low energy 12-bit rate-resolution scalable SAR ADC for wireless sensor nodes”, IEEE J. Solid-State Circuits, vol.42, no. 6, pp. 1196-1205, (2007).

[11]C. Liu et al., “A 1 V 11 fJ/conversion-step 10-bit 10   asynchronous SAR ADC in 0.18   CMOS”, in Proc. IEEE Int. Symp. VLSI Circuits, Honolulu, HI, USA, pp. 241-242, (2010).

[12]B. Haaheim, and T. Constandinou, “A sub-1  , 16 kHz Current-Mode SAR-ADC for Single-Neuron Spike Recording", IEEE Int. Symposium of Circuits and Systems (ISCAS), pp.2957-2960, ( 2012).

[13]J. Zheng and A. Jamalipour, “Wireless Sensor   Networks: A Networking Perspective”, Hoboken, New Jersey: John Wiley Sons, (2009).

[14]B. Razavi, “Design of Analog CMOS Integrated Circuits”, New Dehli, India: Tata McGraw-Hill, (2012). 

[15]G. Huang and P. Lin, “A 15 fJ/conversion-step 8-bit 50 MS/s asynchronous SAR ADC with efficient charge recycling technique”, J. Microelectronics, Elsevier, vol. 43, pp. 941-948, (2012).