INFORMATION CHANGE THE WORLD

International Journal of Computer Network and Information Security(IJCNIS)

ISSN: 2074-9090 (Print), ISSN: 2074-9104 (Online)

Published By: MECS Press

IJCNIS Vol.7, No.1, Dec. 2014

Efficient FPGA Hardware Implementation of Secure Hash Function SHA-2

Full Text (PDF, 539KB), PP.9-15


Views:99   Downloads:4

Author(s)

Hassen Mestiri, Fatma Kahri, Belgacem Bouallegue, Mohsen Machhout

Index Terms

Security;SHA-256;SHA-512;FPGA Implementation

Abstract

The Hash function has been studied by designers with the goal to improve its performances in terms of area, frequency and throughput. The Hash function is used in many embedded systems to provide security. It is become the default choice for security services in numerous applications. In this paper, we proposed a new design for the SHA-256 and SHA-512 functions. Moreover, the proposed design has been implemented on Xilinx Virtex-5 FPGA. Its area, frequency and throughput have been compared and it is shown that the proposed design achieves good performance in term of area, frequency and throughput.

Cite This Paper

Hassen Mestiri, Fatma Kahri, Belgacem Bouallegue, Mohsen Machhout,"Efficient FPGA Hardware Implementation of Secure Hash Function SHA-2", IJCNIS, vol.7, no.1, pp.9-15, 2015. DOI: 10.5815/ijcnis.2015.01.02

Reference

[1]National Institute of Standards and Technology, "Secure Hash Standard", Federal Information Processing Standards 180-4, 2012.

[2]H.E. Michail, G.S. Athanasiou, A.A. Gregoriades, C.L. Panagiotou, C.E. Goutis,High throughput hardware/software co-design approach for SHA-256 hashing cryptographic module in IPSec/IPv6, Global Journal of Computer Science and Technology 10 (4) (2010) 54–59.

[3]I. Algredo-Badillo, C. Feregrino-Uribe, R. Cumplido , M. Morales-Sandoval, FPGA-based implementation alternatives for the inner loop of the Secure Hash Algorithm SHA-256, Microprocessors and Microsystems, 2012, Vol. 37, pp. 750-757.

[4]Kris Gaj, Ekawat Homsirikamol, Marcin Rogawski, Rabia Shahid, and Malik Umar Sharif, Comprehensive Evaluation of High-Speed and Medium-Speed Implementations of Five SHA-3 Finalists Using Xilinx and Altera FPGAs, IACR Cryptology ePrint Archive 2012: 368 (2012).

[5]Yaser Jararweh, Lo'ai Tawalbeh, Hala Tawalbeh, Abidalrahman Moh'd "Hardware Performance Evaluation of SHA-3 Candidate Algorithms" Journal of Information Security, 2012, Vol(3), pp. 69-76.

[6]Kris Gaj, Ekawat Homsirikamol, Marcin Rogawaski "Fair and comprehensive Methodologiy for Comparing Hardware Performance of Fourteen Round Two SHA-3 Candidats using FPGAs" In Proceedings of Cryptographic Hardware and Embedded Systems workshop, CHES 2010, pp. 264-278.

[7]R.Chaves, G.Kuzmanov L. Sousa, S. Vassiliadis "Improving SHA-2 Hardware Implementations" Workshop on Cryptographic Hardware and Embedded Systems, CHES 2006.

[8]McEvoy, R.P., Crowe, F.M., Murphy, C.C., Marnane, W.P "Optimisation of the SHA-2 family of hash functions on FPGAs" IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures, pp. 317-322, 2006.

[9]M. Togan, A. Floarea, G. Budariu, Design and implementation of cryptographic modules on FPGA, in: Proceedings of the Applied Mathematics and Informatics, 2010, pp. 149–154.

[10]Fatma Kahri, Belgacem Bouallegue, Mohsen Machhout, Rached Tourki "An FPGA implementation of the SHA-3: The BLAKE hash function", In 10th International Multi-Conference on Systems, Signals & Devices (SSD), 2013.

[11]Fatma Kahri, Belgacem Bouallegue, Mohsen Machhout, Rached Tourki, "An FPGA implementation and comparison of the SHA-256 and Blake-256", In 14th International Conference on Sciences and Techniques of Automatic Control and Computer Engineering (STA), 2013, pp. 152-157.

[12]Hassen Mestiri, Noura Benhadjyoussef, Mohsen Machhout and Rached Tourki, "A Comparative Study of Power Consumption Models for CPA Attack," International Journal of Computer Network and Information Security, Vol. 5, No. 3, pp. 25-31, 2013.

[13]Hassen Mestiri, Noura Benhadjyoussef, Mohsen Machhout and Rached Tourki, "A robust fault detection scheme for the advanced encryption standard", International Journal of Computer Network and Information Security, Vol. 5, No. 6, pp. 49-55, 2013.

[14]H. Mestiri, N. Benhadjyoussef, M. Machhout and R. Tourki, High performance and reliable fault detection scheme for the advanced encryption standard, International Review on Computers & Software (IRECOS), Vol 8, No 3, pp. 730–746.

[15]J Philippe Aumasson, L Henzen W. Meier, SHA-3 proposal BLAKE varsion 1.3, decembre 16, 2010.